Job Title: IC Verification Engineer

Department: R&D Department

Working place: Changsha, Shanghai, Wuxi

Job Description: According to the specifications, formulate the verification scheme and plan, build the verification environment, and complete the verification work.

Job Responsibilities:

1. Developing module-level and chip-level verification strategies and verification plans according to specifications and verification signoff processes;

2. According to the specifications, decomposing/extracting functional feature points and corresponding test points, design checking strategies, test cases and functional coverage;

3. Building module-level and chip-level verification environments, and completing the writing of verification test cases and functional coverage, as well as the corresponding coverage collection and analysis;

4. Completing the verification report, defect analysis report and verification summary for each project.

Job Requirements:

1. Bachelor degree or above in computer, microelectronics and other related majors;

2. Familiar with UVM, ABV or formal verification methodologies, processes and EDA tools;

3. Proficient in using hardware description languages such as Verilog, SystemVerilog or scala (+LLVM);

4. Familiar with C/C++, Perl or Python scripts language;

5. Proficient in using Linux system tools and commands;

6. Familiar with commonly-used computer buses (including system bus and local bus) is preferred, such as AMBA bus, high-speed peripheral IP (DDR, PCIE, USB, etc.), low-speed peripheral IP (UART, IIC, SPI, GPIO, SDIO, DMA, etc.);

7. Being familiar with computer architecture is preferred;

8. Possessing good communication and cooperation skills, teamwork spirit, and strong sense of responsibility.