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SoC Architect

Click: Time:2022-07-20 15:22:35

Job Title: SoC Architect

Department: R&D Department

Working place: Shanghai, Changsha, Wuxi

 

Description: Responsible for SoC modeling, architecture design and implementation.

 

Responsibilities:

1. Responsible for system performance modeling and SoC product definition;

2. Responsible for SoC architecture design and implementation;

3. Responsible for the design and implementation of SoC-level clock, reset and low power consumption;

4. Participating in the end-to-end process from micro-architecture to full chip RTL implementation;

5. Participating in IP module-level verification and SoC system-level verification;

6. Collaborating with the back-end team to complete timing closure of the entire design.

 

Qualifications:

1. Bachelor degree or above in computer science, microelectronics, electronic engineering and other related majors;

2. Proficient in using verilog, SystemVerilog and other chip design languages;

3. Proficient in scripting languages such as Shell, Perl and Python;

4. Familiar with multi-core CPU’s SoC architecture, having experience in SoC clock and reset design;

5. Familiar with AMBA bus architecture and common buses such as CHI/AXI/AHB;

6. Familiar with high-speed interface protocols, experience with relevant IP is preferred;

7. Familiar with multi-core high-performance RISC-V IC is preferred;

8. Experience in multi-core ARM IC’s SoC design and verification is preferred;

9. Possessing good communication and cooperation skills, team spirit, and strong sense of responsibility.


Leap Ahead, Lead Beyond

Apply by sending your CV to hr@ultrarisc.com

MORE:

SoC Architect

Click: Time:2022-07-20 15:22:35

Job Title: SoC Architect

Department: R&D Department

Working place: Shanghai, Changsha, Wuxi

 

Description: Responsible for SoC modeling, architecture design and implementation.

 

Responsibilities:

1. Responsible for system performance modeling and SoC product definition;

2. Responsible for SoC architecture design and implementation;

3. Responsible for the design and implementation of SoC-level clock, reset and low power consumption;

4. Participating in the end-to-end process from micro-architecture to full chip RTL implementation;

5. Participating in IP module-level verification and SoC system-level verification;

6. Collaborating with the back-end team to complete timing closure of the entire design.

 

Qualifications:

1. Bachelor degree or above in computer science, microelectronics, electronic engineering and other related majors;

2. Proficient in using verilog, SystemVerilog and other chip design languages;

3. Proficient in scripting languages such as Shell, Perl and Python;

4. Familiar with multi-core CPU’s SoC architecture, having experience in SoC clock and reset design;

5. Familiar with AMBA bus architecture and common buses such as CHI/AXI/AHB;

6. Familiar with high-speed interface protocols, experience with relevant IP is preferred;

7. Familiar with multi-core high-performance RISC-V IC is preferred;

8. Experience in multi-core ARM IC’s SoC design and verification is preferred;

9. Possessing good communication and cooperation skills, team spirit, and strong sense of responsibility.


超越未来,睿智同行

如有意者,请将简历投入HR@UltraRISC.com邮箱 欢迎您的加入

Leap Ahead, Lead Beyond

Apply by sending your CV to hr@ultrarisc.com

更多岗位:

超越未来,睿智同行

如有意者,请将简历投入HR@UltraRISC.com邮箱 欢迎您的加入

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Tel: +8621 6882 9919

Fax: +8621 6882 9919

Email:contact@ultrarisc.com

Add: 12th Floor, Yunfei Building, No. 257 Xiangke Road, Pudong New Area, Shanghai

UltraRISC Technology (Shanghai) Co., Ltd. develops high-performance, high-efficient and intelligent multi-core processor products with RISC-V ISA, and is dedicated to a secure, dependable RISC-V ecosystem.

Contact

Address: 12th floor, Yunfei building, 257 Xiangke Road, Pudong New Area, Shanghai

Tel: +8621 6882 9919

Fax: +8621 6882 9919

Email:contact@ultrarisc.com

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